In the field of electronic component manufacturing and packaging, numerous problems exist. One problem in the manufacturing of semiconductor chips is inefficiency and imprecision with respect to placement and location of conductive metalization. For example, when producing semiconductor chips or wafers, the use of screening masks frequently damages the chips or wafers. This generally occurs when prior art vapor deposition masks move while in contact with a wafer or chip surface. This induces scratching and, when foreign material is between the mask and the wafer or chip surface, puncturing may occur. Additionally, the construction of these masks may permit undesired deposition of metalization during the vapor deposition process onto various parts of the chip or wafer surface. This results in a pattern of conductive metalization which generates unwanted electrical shorts between predetermined bond sites. The present invention provides improvements affecting the production and operation of electronic devices and assemblies, and overcomes the problems identified above.